From “Bungalows” to “Skyscrapers”: Unveiling the Stacking Revolution in Storage Chips

Imagine building homes on a finite plot of land. Over the past few decades, the focus has been on creating smaller, more refined single-story houses. Yet once housing sizes have been pushed to their practical limits, further reduction only makes rooms impractical. It was at this point that ingenious architects began to ask: why not look upward and build skyscrapers instead?

This is the true story unfolding in the world of storage chips. 3D NAND 3D flash memory technology lies at the heart of this “upward growth” revolution. From Samsung’s pioneering mass production of 24-layer V-NAND in 2013 to today’s breakthroughs exceeding 300 layers, storage chips are expanding into vertical space at an unprecedented pace.

Today, let’s explore the mysteries of storage stacking technology—why it emerged, where it stands today, and how it will transform our digital lives.

Before the advent of 3D NAND technology, all NAND flash memory was “single-layer”—that is, Planar NAND This technology achieves continuous increases in storage capacity by continually shrinking transistor dimensions, thereby packing more memory cells onto the same chip area.

However, this path ultimately reached a dead end. As process technology approaches 10 nanometers At that point, a series of physical limit issues began to emerge:

The “crosstalk” problem is becoming increasingly severe. When storage cells are packed too closely together, the “walls” between them become increasingly thin; a change in the charge state of one cell can severely compromise the stability of its neighbor, leading to data errors.

Reliability has dropped sharply. At extremely small dimensions, the charge-storage “floating gate” becomes too weak, leading to easy electron leakage and a dramatic reduction in data retention time. It is like a candle flame trembling in the wind—ready to go out at any moment.

Manufacturing difficulty and costs have soared. When feature sizes fall below 20 nanometers, the requirements for lithography precision and material purity increase exponentially, such that even the tiniest incremental advances entail substantial R&D and manufacturing costs.

“Moore’s Law” Faces Challenges Under the current flat-structure paradigm, the pace at which storage density doubles every 18 to 24 months has slowed markedly, indicating that the rate of technological progress is decelerating.

Faced with these challenges, engineers realized that continuing “horizontal expansion” was no longer viable and that they must explore new avenues. Consequently, 3D stacking technology Born of necessity—since it is impossible to shrink storage capacity indefinitely on a flat surface, the solution is to build upward: “storage skyscrapers.”

I. Floor-Count Competition: The “Skyscraper Race” from 24 Floors to Over 400 Floors

In 2013, Samsung was the first to launch 24-layer 3D NAND , marking the official entry of storage chips into the “three-dimensional era.” Since then, a global race has unfolded among the major storage manufacturers to see who can build the tallest 3D memory stack.

Current Global Technological Landscape ：

• Samsung : The 236-layer V8 product is already in mass production, with plans to begin mass production of the 286-layer V9 within 2026; the V10 technology roadmap aims to break through the 400-layer mark.

• SK Hynix : A 321-layer, 2TB QLC NAND has been developed and is expected to be launched in the first half of 2026, making it the world’s first NAND flash memory to surpass 300 layers.

• Micron : 340-layer NAND has entered the sample stage, with plans to develop 400-layer technology.

• Kioxia/Western Digital : Launching 218-layer and 162-layer BiCS8 3D NAND, with development underway on technologies exceeding 300 layers.

The industry consensus is that, through dual-stack or tri-stack cascading technology, Achieve 1,000-layer stacking around 2030. The goal.

II. Technological Roadmaps: Path Choices of the Two Major Camps

Global 3D NAND technology is mainly divided into two major camps:

Traditional monolithic integration architecture : Manufacturers such as Samsung, Micron, and SK Hynix have adopted a solution that integrates the memory array with the peripheral circuitry on the same wafer. However, as the number of layers increases, this architecture faces challenges such as difficult thermal-budget management and high process complexity.

Separate Manufacturing Bonding Architecture For example, Yangtze Memory’s Xtacking and Kioxia’s CBA both adopt a architecture in which the storage array and peripheral circuits are fabricated on separate wafers and then interconnected via hybrid bonding technology.

III. China’s Strength: Yangtze Memory’s “Overtaking on a Curve”

Against the backdrop of global storage giants monopolizing 90% of the market share, Yangtze Memory Technologies has leveraged its independently developed Xtacking architecture , forcibly tearing open a slit.

Technological Breakthrough From the launch of its first 64-layer 3D NAND in 2018 to the mass production of 232-layer products in 2025, Yangtze Memory Technologies has transformed itself from a “follower” into a “leader” in just seven years. Its latest Xtacking 4.0 architecture achieves a 294-layer stack and boosts I/O speeds to 3.6 GT/s.

Market share : Rapidly expanding from less than 1% in 2020, it is poised to reach a new high of 14%–15% by 2026. According to an analysis by TechInsights, Yangtze Memory’s 232-layer 3D NAND is the highest-density NAND currently available on the market and the industry’s first 3D NAND to achieve a bit density exceeding 20 Gb/mm².

Technical Features The Xtacking architecture fabricates the storage cells and peripheral circuits on two separate wafers, which are then vertically stacked using hybrid bonding technology. This design delivers three major advantages: a quantum leap in performance (with I/O speeds increased by a factor of four), a revolutionary boost in storage density (up by 30–48%), and a breakthrough in manufacturing efficiency (shortening the development cycle by three months).

I. A Dual Breakthrough in Performance and Capacity

Geometrically increasing storage density : Under the same chip area, 3D NAND offers a storage density that is 8 to 10 times higher than that of planar NAND. SK Hynix’s 321-layer 2Tb QLC NAND achieves a single-die capacity that is 100% greater than the previous generation.

Significantly increased speed : Yangtze Memory’s Xtacking 3.0 boosts I/O speeds to 2,400 MT/s, fully compliant with the ONFI 5.0 standard and representing a 50% improvement over the previous generation. Micron’s 9650 SSD features a PCIe Gen 6 interface, delivering sequential read speeds of up to 28 GB/s.

Significant reduction in energy consumption: The 3D architecture optimizes the signal transmission path, resulting in a significant reduction in energy consumption per bit. SK Hynix’s 321-layer NAND boasts an energy-efficiency improvement of more than 23% compared with the previous generation.

II. Revolutionary Improvements in Cost and Reliability

Unit costs have decreased by 30–50%. : With technological maturation and increased production volumes, the per-bit cost of 3D NAND has fallen significantly below that of high-end planar NAND.

Significantly improved reliability : The 3D architecture significantly mitigates inter-cell interference, markedly enhances charge retention, and extends data retention from 1–3 years in planar NAND to 5–10 years.

Durability Breakthrough : The number of erase/write cycles has increased from several thousand for planar NAND to Tens of thousands of times , significantly extending the product’s service life.

III. Reshaping the Industry Landscape

Increased technological barriers : The R&D and manufacturing of 3D NAND require massive capital investment, resulting in a market dominated by five major players: Samsung, SK Hynix, Micron, Kioxia/Western Digital, and Yangtze Memory Technologies.

The Rise of China’s Storage Industry : Leveraging its Xtacking technology, Yangtze Memory Technologies has achieved internationally advanced levels in layer count, density, and performance, boosting its global market share from less than 1% to 8%. In July 2025, the company’s first fully domestically produced manufacturing line commenced pilot production, with the goal of capturing 15% of the global NAND Flash supply by the end of 2026.

Changes in the Patent Landscape Yangtze Memory Technologies has filed a lawsuit in the United States against Micron for infringing 11 of its 3D NAND patents, and Samsung also plans to incorporate Yangtze Memory’s patented technologies. This marks China’s transition in the storage industry from a technology follower to a rule-maker.

IV. Expansion of Application Scenarios

Driven by AI storage demand : The continued expansion of application demand, such as AI inference, has significantly boosted the prosperity of the storage industry. HBM (High-Bandwidth Memory), as a representative of 3D-stacked DRAM, has become a critical component for training and inference in large-scale AI models.

Emergence of New Storage Paradigms HBF (High-Bandwidth Flash) draws on HBM’s 3D-stacked architecture, replacing DRAM with NAND flash as the storage core. A single stack can deliver up to 512 GB of capacity, and eight stacks can achieve 4 TB—8 to 16 times the capacity of HBM at the same cost.

Full-scenario coverage From consumer electronics to enterprise-grade storage, and from smartphones to data centers, 3D NAND has become the mainstream choice. In particular, the demand for high-density storage driven by AI computing has further accelerated the development of 3D NAND technology.

From two-dimensional to three-dimensional, from “single-story buildings” to “skyscrapers,” stacking technology represents not only a technological upgrade for the storage industry but also an inevitable choice in the digital age. As planar miniaturization reaches its physical limits, vertical expansion has emerged as a new breakthrough.

This technological revolution has far-reaching and wide-ranging impacts: in terms of performance, storage density and speed have grown exponentially; in terms of cost, the price per unit of storage continues to decline; in terms of the industry landscape, Chinese storage companies have overtaken their global rivals; and in terms of applications, emerging demands such as AI are giving rise to new storage architectures.

In the future, 3D memory stacking technology will continue to advance toward greater layer counts, higher density, and superior performance. With the goal of achieving 1,000-layer stacks drawing ever closer and the emergence of new architectures such as HBM and HBF, memory technology is poised to become one of the most critical infrastructure components of the AI era.

In this smokeless technological race, innovation is the only passport. Whether global giants or China’s rising stars, only by continuously investing in R&D and pushing the boundaries of technology can they build ever-taller “skyscrapers” in the “three-dimensional era” of storage—and leave their mark on the digital landscape.